Ergogen: Add PCB and net definitions

This commit is contained in:
Lexi / Zoe 2024-08-02 18:54:27 +02:00
parent ed1b4b7632
commit eec05917c1
Signed by: binaryDiv
GPG key ID: F8D4956E224DA232
8 changed files with 821 additions and 17 deletions

View file

@ -0,0 +1,30 @@
module.exports = {
params: {
designator: 'D',
side: 'F',
from: undefined,
to: undefined
},
body: p => `
(module SmdDiode (layer ${p.side}.Cu) (tedit 65D012FE)
${p.at /* parametric position */}
${'' /* footprint reference */}
(fp_text reference "${p.ref}" (at 0 0) (layer ${p.side}.SilkS) ${p.ref_hide} (effects (font (size 1.27 1.27) (thickness 0.15))))
(fp_text value "" (at 0 0) (layer ${p.side}.SilkS) hide (effects (font (size 1.27 1.27) (thickness 0.15))))
${''/* diode symbols */}
(fp_line (start 0.25 0) (end 0.75 0) (layer ${p.side}.SilkS) (width 0.1))
(fp_line (start 0.25 0.4) (end -0.35 0) (layer ${p.side}.SilkS) (width 0.1))
(fp_line (start 0.25 -0.4) (end 0.25 0.4) (layer ${p.side}.SilkS) (width 0.1))
(fp_line (start -0.35 0) (end 0.25 -0.4) (layer ${p.side}.SilkS) (width 0.1))
(fp_line (start -0.35 0) (end -0.35 0.55) (layer ${p.side}.SilkS) (width 0.1))
(fp_line (start -0.35 0) (end -0.35 -0.55) (layer ${p.side}.SilkS) (width 0.1))
(fp_line (start -0.75 0) (end -0.35 0) (layer ${p.side}.SilkS) (width 0.1))
${''/* SMD pads */}
(pad 1 smd rect (at -1.65 0 ${p.r}) (size 0.9 1.2) (layers ${p.side}.Cu ${p.side}.Paste ${p.side}.Mask) ${p.to})
(pad 2 smd rect (at 1.65 0 ${p.r}) (size 0.9 1.2) (layers ${p.side}.Cu ${p.side}.Paste ${p.side}.Mask) ${p.from})
)
`
}